The First RISC-V Hackathon in Israel

What a way to end 2019! With a raging winter storm outside of the Western Digital Israel, Kfar Saba office, we kept it warm and cozy with The First RISC-V Hackathon in Israel.

After three months of preparation,
nearly 20 submitted applications, and 10 chosen projects, 50 motivated
participants and five distinguished judges ruled on three winning teams. On
Dec. 27th, we finished 36 hours of round-the-clock development, with
no sleep, in what was truly a special, innovative
atmosphere spurred on by creative people who have a passion for technology.

A RISC-y Endeavor

It was amazing to see representation from so many Israeli ecosystems taking part in the Hackathon. This included students from Bar-Ilan and Ben-Gurion Universities, developers from NextSilicon and GSOC solutions (early stage start-ups), and well-established technology leaders such as Mellanox, IBM, and Western Digital and even a team from the Israel Defense Forces.

There is so much possible for open processor innovation.

The array of hardware and software projects based on RISC-V technology was impressive. From Cyber Security protection, to compression accelerator, Multi Core Unit (MCU) and Artificial Intelligence (AI) accelerator, CORDIC HW accelerator, cache coherency unit, debugging and verification tool, ARM2RISC-V binaries converter, and even an air quality IoT platform – all were developed based on RISC-V technology. There is so much possible for open processor innovation.

The Winners

The panel of judges consisted of
the Israel Innovation Authority CEO, Mr. Aharon
Aharon; Battery Ventures Partner, Itzik Parnafes; Samsung Catalyst Fund, VP & Managing Director,
David (Dede) Goldschmidt; Mellanox, SVP of SW
Architecture, Dror Goldenberg;  Technion Institute of
, Prof. Avi Mendelson, and myself. We voted unanimously
for the 1st place winner.

You are probably waiting to hear about
the winner, right?!

It was a brilliant cyber-security elite
team from the Israeli Defense Forces, which implemented a RISC-V ISA extension
for inst. addresses encryption using hardware concealed key to prevent control
flow hijacking ; and a plugin for RISC-V GCC compiler, to enable Control-Flow
Integrity (CFI) protection in cases where HW modification is not possible.

We have gotten and continue to get
incredible feedback from ecosystem’s partners, and we are all waiting for the
next RISC-V event. Make sure to check for events in your area, and learn about our contributions to
hardware and software solutions that will help grow the RISC-V ecosystem – learn more here.

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